As Eater's website puts it, "this is by far its biggest limitation". This means that the RAM is 4-bit addressable. A RAM module capable of storing 16 bytes.C stands for "carry," and is activated if the ALU produces a carry-out bit.
Z stands for "zero," and is activated if the ALU outputs zero. This module also has a flags register with two possible flags (Z and C). An arithmetic logic unit (ALU) capable of adding and subtracting 8-bit 2's complement integers from registers A and B.Three register modules (Register A, Register B, and the Instruction Register) that "store small amounts of data that the CPU is processing.".An adjustable-speed (upper limitation of a few hundred Hertz) clock module that can be put into a "manual mode" to step through the clock cycles.Eater's design consists of the following modules: YouTuber and former Khan Academy employee Ben Eater created a tutorial building an 8-bit Turing-complete SAP computer on breadboards from logical chips ( 7400-series) capable of running simple programs such as computing the Fibonacci sequence.
High-level overview of Ben Eater's breadboard SAP computer. Therefore, the instructions implemented in the three SAP computer variations are, in each case, a subset of the 8080/8085 instructions. The instruction set architecture (ISA) that the computer final version (SAP-3) is designed to implement is patterned after and upward compatible with the ISA of the Intel 8080/8085 microprocessor family. SAP-2 and SAP-3 are fully Turing-complete. Each of the last two build upon the immediate previous version by adding additional computational, flow of control, and input/output capabilities. The SAP architecture serves as an example in Digital Computer Electronics for building and analyzing complex logical systems with digital electronics.ĭigital Computer Electronics successively develops three versions of this computer, designated as SAP-1, SAP-2, and SAP-3. The Simple-As-Possible (SAP) computer is a simplified computer architecture designed for educational purposes and described in the book Digital Computer Electronics by Albert Paul Malvino and Jerald A. Computer architecture for educational purposes
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